EQUALIZATION - Advanced Signal Integrity for High-Speed Digital Design - page 522

1 ns

1 2 3 4

600 mV

x k

T T T

C C 0 C 1 C 2

− 1

50 mV

4

3

400 mV

− 100 mV

2

1

S

y k

− 50 mV

(a)

1

+ 400 mV

2

− 100 mV

3

4 ns

4

T

(b)

Figure 12-26 Transmitter equalization filter operation: (a) propagation through the filter;
(b) output signal creation.

the process will support. Leading-edge digital silicon manufacturing processes
are pushing the maximum swing below 1.0 V. As a result, designers most often
implement transmit equalization by attenuating the low-frequency bits rather than
by amplifying the high-frequency bits. This is often called deemphasis rather
than preemphasis, to reflect the fact that the equalization is done by reducing the
amplitude of the repetitive bits.
The maximum signal swing limit (for both pre- and deemphasis) places a
constraint on the coefficient settings for an equalizer according to

i | c i |=

1 (12-22)