Digital Signal Processing Reference
In-Depth Information
450
400
350
500 mV
300
250
200
0 0 0 0 1 0 1 0 1 0 1 0 0 0 0 0 1 0 0 0 1 1 1 1 0 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0
150
100
50
0
300 mV
−
50
−
100
−
150
0
0.5
1
1.5
2
2.5
3
3.5
Time (ns)
Figure 12-27
Example preemphasized transmitter output.
Satisfying the equation guarantees that the output signal swing does not exceed
the maximum swing that the manufacturing process can accommodate.
Having developed an understanding of transmitter preemphasis operation, we
can turn to the questions of how many taps are needed to equalize a given system
and how to determine the coefficient settings. We begin the discussion with an
example.
Example 12-4
Effect of the Number of Taps for a 10-Gb/s Interface We com-
pare the performance of the 0.381-m-long differential pair operating at 10 Gb/s
for different numbers of equalizer taps. Once again we use the PCB interconnect
from Example 12-1, which has the following odd-mode quantities at a refer-
ence frequency,
f
0
, of 1 GHz:
C
=
1
.
184 pF/cm,
L
=
2
.
892 nH/cm,
R
=
448
.
2
m
/cm, and
G
=
2.5-mA
0.5-pF differential transmitter with perfect termination. Without equalization the
worst-case eye at the receiver for the system shown in Figure 12-18b is closed
completely (eye height
0
.
144 mS/cm. We drive the interconnect using a
±
=−
34 mV), as calculated using the peak distortion anal-
ysis method (see Chapter 13).
Simulated results for a number of equalizer configurations are shown in
Figure 12-28. Conservative timing and voltage specs for a 10-Gb/s differential
system would require approximately 65 ps and 80 mV minimum at the receiver,
and we use them to assess the adequacy of the equalizer designs.
In calculating the response of the equalizer, we use the expression for the
transfer function of the equalizer (the derivation of which is left as a problem at
the end of the chapter):
N
post
c
k
e
−
j
2
πf (k
−
N
pre
)T
H(f)
=
(12-23)
k
=−
N
pre
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