Hardware Reference
In-Depth Information
width and performance. Having two (dual) independent data I/O buses enables the pro-
cessor to access data from either of its buses simultaneously and in parallel, rather than
in a singular sequential manner (as in a single-bus system). The main (often called
front-
side
) processor bus is the interface between the processor and the motherboard or chipset.
The second (back-side) bus in a processor with DIB is used for the L2 cache, enabling it
to run at much greater speeds than if it were to share the main processor bus.
Two buses make up the DIB architecture: the L2 cache bus and the main CPU bus, often
called
FSB (front-side bus)
. The P6 class processors, from the Pentium Pro to the Core 2,
as well as Athlon 64 processors can use both buses simultaneously, eliminating a bottle-
neck there. The dual bus architecture enables the L2 cache of the newer processors to run
at full speed inside the processor core on an independent bus, leaving the main CPU bus
(FSB)tohandle normal data flowinginandoutofthechip.Thetwobusesrunatdifferent
speeds. The front-side bus or main CPU bus is coupled to the speed of the motherboard,
whereas the back-side or L2 cache bus is coupled to the speed of the processor core. As
the frequency of processors increases, so does the speed of the L2 cache.
DIBalsoenablesthesystembustoperformmultiplesimultaneoustransactions(insteadof
singular sequential transactions), accelerating the flow of information within the system
and boosting performance. Overall, DIB architecture offers up to three times the band-
width performance over a single-bus architecture processor.
HT Technology
Intel's HT Technology allows a single processor or processor core to handle two inde-
pendentsetsofinstructionsatthesametime.Inessence,HTTechnologyconvertsasingle
physical processor core into two virtual processors.
HT Technology was introduced on Xeon workstation-class processors with a 533MHz
system bus in March 2002. It found its way into standard desktop PC processors starting
with the Pentium 4 3.06GHz processor in November 2002. HT Technology predates mul-
ticore processors, so processors that have multiple physical cores, such as the Core 2 and
Core i Series, may or may not support this technology depending on the specific pro-
cessor version. A quad-core processor that supports HT Technology (like the Core i Ser-
ies) would appear as an 8-core processor to the OS; Intel's Core i7-990x has six cores and
supports up to 12 threads.
How HT Works
Internally, an HT-enabled processor has two sets of general-purpose registers, control re-
gisters,andotherarchitecture components foreachcore,butbothlogical processorsshare
the same cache, execution units, and buses. During operations, each logical processor
handles a single thread (see
Figure 3.2
)
.
