Image Processing Reference
In-Depth Information
5.3.2.3 Shared Pixel Architecture
A pixel of a IT-CCD is made up of one PD and two electrodes of a CCD, as shown Figure 5.10.
While the PD is surrounded by isolation, because each part can be arranged without a
separator, a pixel is formed in a small area. On the other hand, one PD and four transis-
tors are necessary for CMOS sensors. One transistor is made up of one gate electrode, two
diffusions for the source and drain, and a separator surrounding them. A larger area is
necessary to form 4-Tr pixel configuration. This is the main reason that CMOS sensors
were not produced in quantity until the late 1990s, while MOS sensor and CCD production
started in the early 1980s. Small size MOSFET technology, with CMOS processing technol-
ogy around 0.35 μm, which enabled 4-Tr pixel configuration, had to be realized first to
lessen the cost restriction. Still, a 4-Tr pixel needs four transistors.
As a method of pixel shrinkage, shared pixel architecture,
34
in which one FDA is shared
by plural pixels, is mainstream in the field of small pixel sensors. In an example of two-
shared pixel configuration shown in Figure 5.48a, reset transistor (RS), drive transistor
(amplify transistor), and row selection transistor (RS) are shared by two pixels. The ele-
ments of each pixel that are not shared are the PD, transfer (readout) transistor (TX), and
FD, and FDs are connected by wiring. Since there are five transistors for two pixels, the
number of transistors per one pixel is decreased to 2.5, that is, 2.5 Tr/pixel. An exam-
ple of a four-shared pixel is shown in Figure 5.48b. As the shared parts are the same as
in Figure 5.48a, seven transistors exist for four pixels, that is, 1.75 Tr/pixel. An increase
in the number of shared pixel causes capacitance increase of FD, since the number of
V
dd
V
dd
RST
Drive
transistor
RST
Drive
transistor
TX1
TX1
p
+
p
+
RS
RS
FD
FD
n
-
n
-
PD1
PD1
TX2
TX2
FD
FD
(a)
PD2
PD2
TX3
FD
PD3
TX4
FD
(b)
PD4
FIGURE 5.48
Shared pixel configuration: (a) two-shared pixel configuration (2.5 Tr/pixel); (b) four-shared pixel configuration
(1.75 Tr/pi xel).
