Reversible and Adiabatic Computing: Energy-Efficiency Maximized - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 347

Fig. 6. Simulated average power consumption of the ALU on 2 lm standard CMOS,

irreversible vs. reversible mode, as a function of operating frequency.

The comparison of irreversible standard clocking and reversible Bennett-clocking
in a 4-bit ALU at the 20 nm node with tri-gate CMOS model is shown in Fig. 7 .
Although the transistor circuit with reversible/adiabatic operation consumes power
approximately with a square-law dependency on the frequency, the approach is still

Fig. 7. Simulated average power consumption of the ALU on 20 nm tri-gate CMOS,

irreversible vs. reversible mode, as a function of operating frequency