Nanomagnet Logic (NML) - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 26

In this way, NML can leverage much existing technological know-how, and also
benefit from future development in MRAM technologies [ 20 ].
Under the umbrella of the DARPA Non-Volatile Logic (NVL) program, we
worked on approaches to on-chip clocking. As mentioned above, externally supplied
switching energy is needed to re-evaluate a magnet ensemble with new inputs.
To date, most NML circuits have been ''clocked'' by an external source. However, it is
essential that clock functionality be moved ''on-chip.'' Thus far, the most commonly
employed clock is a magnetic field applied along the hard axis of an NML ensemble,
which places the magnets into a metastable state such that they are sensitive to the
fringing fields from their neighbors. Such magnetic fields can be generated on-chip by
current-carrying wires for local control of NML circuits. In recent work, we have
fabricated copper wires clad with ferromagnetic material on the sides and bottom (like
field-MRAM word and bit lines), and we have demonstrated that NML magnets,
interconnect, and logic gates can be switched (i.e. re-evaluated) in this way [ 21 , 22 ].
Also under the umbrella of the DARPA Non-Volatile Logic (NVL) program, we
worked on approaches for integrated electronic I/O. Electronic output can be achieved
(similar to MRAM) by a magnetoresistance measurement, where the NML output dot
is the free layer in a magnetic tunnel junction (MTJ) stack. Similarly, electronic input
can be achieved using the spin-torque transfer (STT) effect, where the NML input dot
is the free layer in an STT stack [ 23 , 24 ].
As is well known from field-MRAM, there is an energy overhead associated with
generating local magnetic fields using current-carrying wires. Early on, simulations
showed that the overhead associated with such clocking is a major component of the
total energy requirement, and that the dissipation associated with the switching of the
magnets is rather small [ 25 ]. For NML, the clock energy could be amortized over
100,000s of devices as a single clock line could control many parallel ensembles [ 26 ].
Clock lines could be placed in series and in multiple planes to minimize driver
overhead. Moreover, at cryogenic temperatures, clock lines could be made from
superconducting niobium, and I 2 R losses could drop to zero. In principle, this opens
the door to extremely low energy information processing hardware/memory that could
be integrated with RSFQ and SQL logic.
Also inspired by field-MRAM, another approach to lowering the energy overhead
associated with clocking is to engineer the dielectric medium between the dots, which
influences the coupling strength and thus the switching energy. Specifically, one can
enhance the permeability of a dielectric by the controlled inclusion of superpara-
magnetic particles that increase the dielectric permeability, and thus lower the current
required to achieve a certain switching field [ 27 ]. Following this approach, we have
successfully fabricated such enhanced permeability dielectrics and demonstrated the
lowering of switching fields and associated power dissipation [ 28 - 30 ].
Another possible approach to clocking is to exploit the strong local fields asso-
ciated with a domain wall. We have shown that the motion of domain walls can be
controlled [ 31 , 32 ], and that their local fringing fields can assist in the switching of
nearby magnets [ 33 ]. This is an interesting approach to NML clocking that deserves
further investigation.
Multiferroics, magnetostriction, and spin-torque transfer have also been proposed
as potential clocking mechanisms for NML. Multiferroic materials (e.g. BFO) could