Nanomagnet Logic (NML) - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 27

allow for electric field control of magnetism, which would be highly attractive for
NML. Included in this volume is a contribution from the group of Sayeef Salahuddin
at UC Berkeley that addresses this interesting possibility [ 34 ].
Another important issue for NML is whether or not the magnets that form a circuit
ensemble can be switched reliably - or whether or not devices placed into a meta-
stable state by a clock are adversely affected by thermal noise (which could induce
premature switching). The group of Jeff Bokor at UC Berkeley has shown that
magnets with an extra biaxial anisotropy exhibit superior switching characteristics
[ 35 ]. Essentially, such an ''engineered-in'' magnetic anisotropy helps to stabilize the
magnets in the ''vulnerable'' metastable state against random fluctuations. We have
shown that shape engineering, i.e. exploiting the influence of geometry on magnetic
properties, can be used to not only enhance the reliability of switching, but also to
design logic gates with reduced foot print [ 36 , 37 ].
At Notre Dame, all of our work to date has been based on patterned thin-film
permalloy dots, which have in-plane magnetization. An attractive alternative is to use
structures with out-of-plane magnetization, such as Co/Pt multi-layer films, where the
magnetic properties are due to the Co-Pt interfaces. In collaboration with Doris
Schmitt-Landsiedel and her group at the Technical University of Munich (TUM),
we are exploring the utility of this material system for NML. It has been shown that
such Co/Pt structures can be patterned with a focused ion beam (FIB) instrument,
where the ion beam destroys the interfaces, and thus the magnetization at these
locations. In this fashion, a film can be patterned into islands, and sufficiently small
islands also exhibit single-domain behavior. The TUM group has demonstrated
magnetic coupling between neighboring islands [ 38 ], and they have shown magnetic
ordering in arrays of coupled islands. Moreover, they have realized directional signal
propagation in lines, and basic NML logic gates [ 39 ], as well as domain-wall assisted
switching [ 40 ].
All our fabrication work so far has been based on using electron-beam lithography
(EBL) to define the NML devices and structures. EBL is a flexible and useful tool for
research, but not suitable for large-scale manufacturing. To this end, we collaborate
with Paolo Lugli and his group at the TUM to explore the use of nanoimprint
lithography and nanotransfer of permalloy structures for the fabrication of large-scale
NML arrays [ 41 ].
NML represents a technology quite different from CMOS, with its own ''pros'' and
''cons.'' Undoubtedly, this new technology will likely necessitate new circuit and
architecture approaches [ 42 ]. Along these lines, we have worked to identify specific
application spaces for NML. Our immediate focus is on low energy hardware
accelerators for general-purpose multi-core chips, and application spaces that demand
information processing hardware that can function with an extremely low energy
budget. As an example, we anticipate that NML-based hardware might be used to
implement a systolic architecture that can improve the performance of compute-bound
applications, provide very high throughput at modest memory bandwidth, and elim-
inate global signal broadcasts. (Systolic solutions exist for many problems including
filtering, polynomial evaluation, discrete Fourier transforms, matrix arithmetic and
other non-numeric applications.) Moreover, as devices are non-volatile, information
can be stored directly and indefinitely throughout a circuit (e.g. at a gate input)