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different Hamming distance [
31
], as shown in Fig.
19
. From this figure, it is clear
that the power dissipated in the Bennett-clocked QCA OR gate during input
changes is extremely low, even lower than the bit erasure energy, i.e.,
K
B
Tln
(2).
Compared with the Landauer-clocked OR gate, the most important point is that
there is almost no power difference for a Bennett-clocked OR gate between the
input changes from '1' to '1' and '1' to '0'. Therefore, by using Bennett clocking,
the power dependence of basic gates on the inputs is effectively removed making
it impossible to perform a power analysis attack albeit at the cost of speed. As
a result, cryptographic circuit design using Bennett clocking in QCA would act
as a natural countermeasure to power analysis attacks.
7 Conclusion
An investigation into the resistance of QCA cryptographic circuits to power
analysis attacks is presented under both the best case and the worst case sce-
narios from an attackers' point of view.
Based on the upper bound power model, the power dependence on Hamming
distance in basic QCA gates including majority gates and inverters has been
shown. An ecient design of the Serpent
S
0
-box is presented with a reduction of
45 %, 42 % and 59 % in terms of number of cells, area and latency, respectively
over previous work. The power consumption of the Serpent sub-module is simu-
lated using QCAPro based on the upper bound power model. A power analysis
attack procedure for QCA is proposed to reveal the secret key by statistically
comparing the power consumption and all hypothetical key guesses. The first
power analysis attack of a QCA cryptographic circuit is presented under a best
case scenario (for the attacker). A DPA attack of the Serpent sub-module is per-
formed and the results show that all possible subkeys of Serpent can be revealed
by power analysis attacks. Therefore, QCA cryptographic circuits under quasi-
adiabatic switching could be vulnerable to power analysis attack. However, the
security of QCA circuits can be improved greatly by applying a smoother clock.
In the worst case scenario for the attacker, QCA cryptographic circuits can
be designed with reversible computing using Bennett clocking, which removes
the power dependence on the basic gates, making power analysis attack impos-
sible. Therefore, a Bennett-clocked QCA circuit design could be used to prevent
power analysis attacks. It is believed that QCA could be a niche technology to
implement security architectures resistant to power analysis attack in the future.
References
1. ITRS: International Technology Roadmap for Semiconductors (ITRS), website
2. Lent, C.S., Tougaw, P.D., Porod, W., Bernstein, G.H.: Quantum cellular automata.
Nanotechnology
4
(1), 49-57 (1993)
3. Lent, C.S., Tougaw, P.D.: A device architecture for computing with quantum dots.
Proc. IEEE
85
, 541-557 (1997)
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