The Architecture of Electronic Data Carriers - RFID: Fundamentals and Applications in Contactless Smart Cards and Identification - page 270

L

U demod

C R

Figure 10.6 A 100% ASK modulation can be simply demodulated by an additional diode

additional diode to rectify the HF voltage of the transponder resonant circuit. The time
constant τ = R · C should be dimensioned such that the carrier frequency (13.56MHz)
is still effectively filtered out, but the modulation pulse ( t pulse = 3 µ s in accordance with
ISO 14443-2) is retained as far as is possible.

10.1.2 Address and security logic

The address and security logic forms the heart of the data carrier and controls all
processes on the chip (Figure 10.7).
The power on logic ensures that the data carrier takes on a defined state as soon as
it receives an adequate power supply upon entering the HF field of a reader. Special
I/O registers perform the data exchange with the reader. An optional cryptological unit
is required for authentication, data encryption and key administration.

Vcc Power ON

Data

Data input

I/O register ROM

Address

Data output

State
machine

EEPROM
FRAM
or SRAM

Crypto
unit

HF interface

System clock

Figure 10.7 Block diagram of address and security logic module