Digital Signal Processing Reference
In-Depth Information
R1
4R7
JP6
L1
Card L
R6 470R
D3
BAR42
D4
BAR42
R mode
CV1
6..60p
R3
1M
R5
1M
R9
1K
C4
10p
C6
10p
D6
3VB
C1
22p
JP7
C2
100p
C3
10n
R4
1M
R6
1M
R mode
Connect for
C mode only
R2
4K7
C mode
U4: A
74HC03
Subcarrier phase
JP5
VCC
VCC
1
2
U1
74HC4040
3
Phase + p1/2
10
9
7
5
3
4
13
12
1 15
1
CLK
D1
D2
D3
D4
D5
D D7
D8
D9
D10
D11
D12
U3: D
U2: B
74HC74
U4: A
74HC03
Phase 0
74HC00
U3: C
74HC00
13
12
11
10
9
4
5
8
12
11
9
6
U3: A
74HC00
D
D
11
VCC
RST
1
2
CLK
3
U4: C
74HC03
8
U3: B
74HC00
D
9
10
4
5
8
6
U4: D
74HC03
2
3
JP10
JP4
D
5
6
12
13
Phase + p1
Phase 0
D
D
VCC
11
CLK
5
4
3
2
1
U2: A
74HC74
Test PICC ISO/IEC 14443-2
Figure 10.5 Example circuit of a HF interface in accordance with ISO 14443
 
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