Civil Engineering Reference
In-Depth Information
if the evaluate phase causes the dynamic node to go low, then the completion
of the fall transition at
o
during precharge is irrelevant.
if the evaluate phase causes the dynamic node to remain high, then it will
remain so until the end of the precharge phase in the next clock cycle, and
the node
o
correspondingly has a long time (equal to
to discharge,
and therefore the constraint is very loose.
In most cases, the overriding timing constraint will ho due to some other con-
straint, such as that corresponding to a gate at which the signal
o
is being
utilized.
(iv) In the previous clock cycle, a falling input data line may not go down to
logic 0 but must be held at the logic 1 level until the output transition in that
cycle has been completed. In other words, it is required that
The term is conservatively added here, since the fact that node has
reached the 50% point as it transitions to logic 0 does not, in general, guaran-
tee that the output inverter will charge up to 1. Although the output inverter
is often sized in a skewed manner, so that if is at the 50% point, then the
output will be well on its way to discharging, there may be issues related to
short-circuit current that require this stronger criterion.
(v) For any rising input data line, the hold constraint states that a transition
should occur only after
i.e.,
These constraints are similar to the short path constraint in static timing anal-
ysis.
7.5.3
Timing analysis
The timing analysis procedure described here is based on the CPM procedure.
In mixed static-domino circuits, the static elements can easily be represented
by nodes in the CPM graph. Dynamic nodes can also be represented as nodes
in the CPM graph by representing output rise and fall times by expressions sim-
ilar to Equation (7.27), and then using the relaxed version of the constraint,
replacing each “max” by an inequality. This may be intuitively seen by ob-
serving that the relations in Section 7.5.2 can be written in terms of difference
constraints [CLR90].
The determination of rising and falling event arrival times at the output
node of a domino gate is similar to the CPM computation for static gates. A
major difference is that the rising event at the dynamic node is related only
to the falling edge of the domino clock and is independent of the other input
