GNSS Signal Simulation - A Software-Defined GPS and Galileo Receiver: A Single-Frequency Approach - page 150

3 3

2 2

1 1

0 0

−1 −1

−2 −2

−3 −3

0 2000 4000 6000 8000 10000 12000 0 20 40 60 80 100 120

Sample Sample

(a) (b)

FIGURE B.3. C/A code. (a) A complete cycle through a complete PRN code period. (b)
The first samples of the C/A code.

The sampled C/A code is multiplied with the sampled navigation data in the
next block. The navigation data is also a binary data sequence consisting of 1's

and 1's. The sampled navigation data generation will be described in the following
section.
When the C/A code is combined with the navigation data, it must be modulated
onto a carrier. This carrier is generated as a cosine wave in a voltage-controlled
oscillator (VCO). The VCO has an input from a ramp block. This block simulates
the change in frequency as a function of the Doppler rate. If the Doppler rate is
zero, the frequency of the VCO remains constant.
The BPSK modulation of the C/A code and data signal is implemented as a
multiplication of the signal with the generated carrier wave.

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B.2.2 Navigation Data Generation
The generation of the navigation data component of the GPS signal is indicated
within part B in Figure B.1. As mentioned earlier, the bit rate of the binary naviga-
tion data sequence is 50 Hz. In the simulator, the generator signal to the navigation
data sequence is obtained from the output of the counter in the C/A part. As seen
in Figure B.2a, the counter resets after running through a complete PRN code se-
quence. As mentioned, this period is 1 ms corresponding to a rate of 1 kHz. To
obtain a 50 Hz signal from the signal supplied by the C/A counter, the first block
in the navigation data part is a counter, which increases its value on every falling
edge of the input signal. The counter resets when it reaches 20, that is, every 20 ms
corresponding to 50 Hz. That is, the output from the first counter in the navigation
data part of the simulator supplies a 50 Hz signal to the next block.
The next block is also a counter. This counter works in the same way as the
counter in the C/A part. That is, it increases its output value with every falling
edge of the input signal, and it resets at the end of a period. In this case, the period
is set to be one navigation data frame corresponding to 1500 bits.