GPS Satellite Signal Characteristics - Understanding GPS: Principles and Applications - page 131

Set X1A epoch

10.23 MHz

Reset

X1
epoch

X1A
Register

Clock
Input A

1 6 12

.

. .

4092
decode

.
.

÷ 3750 ⊕

6, 8, 11, 12

Resume
Halt

Z-counter
403200 ÷

Clock
control

. Set X1B epoch

Clock Reset

÷ 3749

X1B
Register

B

Input

1 12

.

4093
decode

7 day reset

.

.
.

⊕
1, 2, 5, 8,
9, 10, 11, 12

End / week

Halt

Note: Reset =
reset to initial
conditions on
next clock.

Note: Reset =
reset to initial
conditions on
next clock.

Clock
control

.

Set X2A epoch

Clock

Reset

÷ 3750

X2A
Register C

Input

1 12

.

4092
decode

⊕
1, 3, 4, 5, 7, 8,
9, 10, 11, 12

.
.

start / week

Resume

Enable

X2
epoch

÷ 37
clock

A

B

End / week

Halt

X1

P i

Clock
control

X2B
Register

Set X2B epoch

Clock
Input

Reset X2 i

÷ 3749

1 2 12

i

1 37

.
.

C

4093
decode

X2 ⊕

2, 3, 4, 8,
9, 12

.
.

Shift register
clock

.

Figure 4.11 P code generator.

sive-or circuit to form an X1 sequence derived from X1A ⊕ X1B, and an X2

sequence derived from X2A X2B. The X2 sequence is delayed by i chips (corre-

sponding to SVi) to form X2i. The P code for SVi is Pi

⊕

= X1 ⊕ X2i.