Reduced Instruction Set Computers (RISCs) - Fundamentals of Computer Organization and Architecture - page 220

2. Optimize the design of instruction pipelines such that minimum compiler code
generation can be achieved (see Chapter 8).
3. Use a simplified instruction set and leave out those complex and unnecessary
instructions.

The following two approaches were identified to implement the above three

mechanisms.

1. Software approach. Use the compiler to maximize register usage by allocat-
ing registers to those variables that are used the most in a given time period
(this is the philosophy adopted in the Stanford MIPs machine).
2. Hardware approach. Use ample CPU registers so that more variables can be
held in registers for larger periods of time (this is the philosophy adopted in
the Berkeley RISC machine). The hardware approach necessitates the use
of a new register organization, called overlapped register window. This is
explained below.

10.3. OVERLAPPED REGISTER WINDOWS

The main idea behind the use of register windows is to minimize memory accesses.
In order to achieve that, a large number of CPU registers are needed. For example,
the number of CPU general-purpose registers available in the original SPARC
machine (one of the earliest RISCs) was 120. However, it is desirable to have
only a subset of these registers visible at any given time and to have them addressed
as if they were the only set of registers available. Therefore, CPU registers are
divided into multiple small sets, each assigned to a different procedure. A procedure
call will automatically switch the CPU to use a different fixed-size window of reg-
isters. In order to minimize the actual movement of parameters among the calling
and the called procedures, each set of registers is divided into three subsets: par-
ameter registers, local registers, and temporary registers. When a procedure call is
made, a new overlapping window will be created such that the temporary registers
of the caller are physically the same as the parameter registers of the called pro-
cedure. This overlap allows parameters to be passed among procedure without
actual movement of data (Fig. 10.1).

Level j
(Caller)

Parameter
Registers

Local
Registers

Temporary
Registers

Call/Return

Level j + 1
(called)

Parameters
Registers

Local
Registers

Temporary
Registers

Figure 10.1 Register window overlapping