Memory System Design I - Fundamentals of Computer Organization and Architecture - page 115

Having shown the division of the main memory address, we can now proceed to
explain the protocol used by the MMU to satisfy a request made by the processor for
accessing a given element. We illustrate the protocol using the parameters given in
the example presented above (Fig. 6.6).
The steps of the protocol are:
1. Use the Block field to determine the cache block that should contain the element
requested by the processor. The Block field is used directly to determine the
cache block sought, hence the name of the technique: direct-mapping.
2. Check the corresponding Tag memory to see whether there is a match between
its content and that of the Tag field. A match between the two indicates that the
targeted cache block determined in step 1 is currently holding the main
memory element requested by the processor, that is, a cache hit.
3. Among the elements contained in the cache block, the targeted element can be
selected using the Word field.
4. If in step 2, no match is found, then this indicates a cache miss. Therefore, the
required block has to be brought from the main memory, deposited in the cache,
and the targeted element is made available to the processor. The cache Tag
memory and the cache block memory have to be updated accordingly.
Figure 6.6 Direct-mapped address translation