Biomedical Engineering Reference
In-Depth Information
External Device
Off chip component
Implant Device in the Eye
EPI-RETINA Prosthesic Chip
D1
VddH = +12 V
VddL = +1.8 V
VddH = +12 V
Power
Regulators
& Reverse
Telemetry
D2
1-10 uF
Power Tx
Vgnd = 0 V
VaaL = -1.8 V
Pixel [0]
Pixel [1]
Vgnd = 0 V
D3
VssH = -12 V
1-10 uF
2MHz Clk
Bulk
Power on Reset
D4
VssH = -12 V
2 MHz
CLK
Pixel [254]
Pixel [255]
Area PAD
22 MHz
CIK
2 Mbps
Data
DPSK
Demodulator
Global Digital
Controller
2
6
Data Tx
1
st
HPF
ESD
Bus
+
VddH = +1.8 V
Charge
Cancellation
HV Current
Driver
Level Shifter
LV DAC & VGM
Local Digital
Controller
1-10 uF
+
∑
Delay
II
S/H
Bit Slicer
-
Input
NRZ
Data
Reset
Accumulator
Vgnd = 0 V
1-10 uF
Symbol Edge
Detector
2 MHz CLK
Data CLK
VaaH = -1.8 V
FIGURE 16.6
An.example.of.epiretinal.implant.architecture.
