Computational Functions’ VLSI Implementation for Compressed Sensing - VLSI Design and Test - page 37

3 Design and Implementation

3.1 Design
We designed various architectural entities and have presented the architecture. These
entities are used multiple times in the CS recovery schemes. The details are as
follows:
• L 1 norm of vector

• L 2 norm of vector

• SVD calculation using Bi-diagonalization of matrix with QR algorithm (Bi-

diagonalization entity , Sum1, Sum2 and Squareroot entities)
The design and RTL implementation of L 1 norm of vector, L 2 norm of vector and Bi-
diagonalization are given below. The QR algorithm's functional implementation has
been used for testing SVD.
L 1 Norm and L 2 Norm:
The Fig. 1 gives iterative design and RTL implementation of L 1 norm and L 2 norm for
a vector. To our knowledge L 1 norm and L 2 norm architecture is not available in
literature comes as our contribution.

Fig. 1. (a) L 1 norm of vector (b) L 2 norm of vector (c) RTL view

Bi-diagonalization:
The Householder's reduction [17-18] to Bi-diagonal form is designed and
implemented in VHDL. The Bi-diagonalization steps are given below:

1. Compute the transformation on matrix A for the ith column and place the

ith diagonal in vector1, Apply transformation

2. Place the ith row of Matrix A into vector2 for the row transformation and

it's calculation

3. Store the transformation in U