Information Technology Reference
In-Depth Information
the PCI bus, and the arbitration logic must then activate the
GNT
signal so that the request-
ing master gains control of the bus. To prevent a bus lock-up, the busmaster is given 16 CLK
cycles before a time-overrun error occurs.
4.4
Other PCI pins
The other PCI pins are:
•
RST
(Pi
n A15) - resets all PCI devices.
PRSNT1
and
PRSNT2
(Pins B9 and B11) - these, individually, or jointly, show that there
is an instal
led dev
ice and what the power consumption is. A setting of 11 (that is,
PRSNT1
is a 1 and
PRSNT2
is a 1) indicates no adapter installed, 01 indicates maximum power dis-
sipation of 25 W, 10 indicates a maximum dissipation of 15 W and 00 indicate a maxi-
mum po
wer dissipation of 7.5 W.
•
DEVSEL
(Pin B37) - indicates that addressed device is the target for a bus operation.
•
TMS
(test mode select),
TDI
(test data input),
TDO
(test data output),
TRST
(test reset),
and
TCK
(test clock) - used to interface to the JTAG boundary scan test.
•
IDSEL
(Pin A26) - used for device initialization select signal during the accessing of the
config
uration area.
•
•
LOCK
(Pin A15) - indicates that an addressed device is to be locked-out of bus transfers.
All ot
her un
locked devices can still communicate.
PAR
,
PERR
(Pins A43 and B
40) -
The parity pin (
PAR
) is used for even parity for
AD31
-
AD0
and
C/B
E3-C/BE0, and
PERR
indicates that a parity error has occurred.
•
•
SDONE
,
SBO
(Pins A40 and A41) - used in snoop cycles.
SDONE
(snoop done) and
SBO
(
snoo
p back off signal).
SERR
(Pin B42) - used to indicate a system error.
•
STOP
(Pin A38) - used by a device to stop the current operation.
•
•
ACK64
,
REQ64
(Pins B60 and A60) - the
REQ64
signal is an active request for a 64-bit
transfer and
ACK64
is the acknowledge for a 64-bit transfer.
4.5
Configuration address space
Each PCI device has 256 bytes of configuration data, which is arranged as 64 registers of 32
bits. It contains a 64-byte predefined header followed by an extra 192 bytes which contain
extra configuration data. Figure 4.5 shows the arrangement of the header. The definitions of
the fields are:
•
Unit ID and Man. ID - a Unit ID of FFFFh defines that there is no unit installed, while
any other address defines its ID. The PCI SIG, which is the governing body for the PCI
specification, allocates a Man. ID. This ID is normally shown at BIOS start-up. Section
4.8 gives some example Man. IDs (and plug-and-play IDs).
•
Status and command.
