Civil Engineering Reference
In-Depth Information
3.4.4.4
Outlook
The MultiCAN module includes several useful extensions against the TwinCAN
module. The list structure grants a high degree of flexibility to user and more free-
dom for CAN applications. The double-chained list-structure enables a highly flex-
ible FIFO structure, as the FIFO elements can be collected among the CAN module.
Therefore, the reception on faster CAN bus can be buffered in-between for the trans-
mission on a low-speed bus. The USIC on the XC2000 family rounds out this flexi-
bility to the LIN bus. The external bus controller (EBC) allows attaching an external
FlexRay device, if this is not included internally. Therefore, the currently existing
serial bus systems widely used in automotive environment are available on the de-
vice. The FIFOs within CAN and USIC, which is used for LIN, ease the implemen-
tations and reduce the overall CPU load for transferring data from one bus system
to another. However, these features become useful not only for automotive applica-
tions but also for industrial applications. The MultiCAN is used on several members
of the industrial microcontroller families, for example, the TC11xx, XE16x, and
XC8xx. These devices are optimized for automation and industrial drivers.
3.5
Xilinx CAN-Controller LogiCORE™ IP
The features of Xilinx CAN Controller are that it:
• Conforms to ISO 11898-1, CAN 2.0A, and CAN 2.0B standards
• Supports Industrial (I) and Extended Temperature Range (Q)
• Supports standard frames (11-bit identifier) as well as extended frames (29-bit
identifier)
• Supports bit rates up to 1 Mbps
• Transmits message FIFO with a user-configurable depth of up to 64 messages
• Prioritized message transmission through High-Priority Transmit Buffer
• Automatic re-transmission on errors or lost arbitration
• Receive message FIFO with a user-configurable depth of up to 64 messages
• Acceptance filtering by (a user-configurable number of) up to four acceptance
filters
• Sleep mode with automatic wakeup
• Loop back mode for diagnostic applications
• Maskable error and status interrupts
• Has readable error counters (Fig.
3.19
).
3.5.1
User Interface
The external interface of the CAN controller is a subset of the Xilinx Intellectual
Property Inter-connect (IPIC) signalling. This enables the CAN controller to be
