Biomedical Engineering Reference
In-Depth Information
unprecedented downscaling of its dimensions. Nowadays, commercial MOSFETs
have gate lengths of less than 100 nm, more precisely, in the range 50-70 nm,
depending on applications. Billions of such transistors are integrated in various
very large-scale integrated circuits such as memories or microprocessors, which
are present in any computer or mobile phone. The semiconductor technology is so
efficient and cheap that, in 2002, a DRAM contained a larger number of CMOS
transistors than the amount of rice grains produced that year, one grain of rice being
as expensive as 100 transistors ( Van der Spiegel 2004 ).
The reduction of MOSFET dimensions is described by Moore's law
( Moore 1995 ), which states that at every 1.5 years since 1970, the number of
transistors per integrated circuit chip, for instance per microprocessor, doubles.
However, adverse effects termed as short-channel effects occur once the MOSFET
dimensions shrink and reduce drastically the transistor performances. So, emerging
transistors with other types of channels, for example, based on nanomaterials, are
increasingly used and will be described within this chapter.
The MOSFET transistor can be understood with the help of a simple configura-
tion, referred to as MOS capacitor (see Fig. 2.1 ), which contains a substrate and a top
metal gate, separated by a dielectric layer. The substrate is a doped semiconductor,
typically p-Si, and the dielectric/isolator layer which is usually SiO 2 . A negative
gate voltage V G applied between the semiconductor and the metal traps the holes at
the interface between the dielectric and the semiconductor. Conversely, when V G is
positive, the holes are forced away from the interface, generating a depletion region,
with width
x dep D .2" s j s j eN s / 1=2 ;
(2.1)
where " s is the substrate permittivity, j s j is the surface potential originating
from the bending of Si energy bands caused by V G ,andN s denotes the substrate
concentration.
The bending of the Si conduction energy band has an effect on the transport of
electrons in p-Si, which are the minority carriers, toward the top of the depleted
layer. As V G increases, it reaches a threshold gate voltage V th , at which the electron
concentration balances the concentration of holes in the substrate, higher gate
voltage inducing the creation of an inversion layer beneath the dielectric, called
SiO 2
V G
p - Si
Fig. 2.1 Schematic
representation of the MOS
capacitor
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