Digital Design of Communication Systems - Digital Design of Signal Processing Systems: A Practical Approach - page 542

Column logic

0

0
1

row 0

1

row 1

0
1 2

0

1

0
1

row 2

3

row 3

0
1

4

2

3

0
1

row 4

5

row 5

0
1

4

4

5

0
1

row 6

5

row 7

0
1

6

6

0
1

7

7

Pointer

match-flag

pointer match flag

(a)

(b)

Figure 13.21 Pointer calculation logic for each column: (a) with serial complexity, and (b) with logarithmic complexity