Using a Hardware Description Language - Digital Design of Signal Processing Systems: A Practical Approach - page 31

Amemory is declared as a two-dimensional variable of type reg , the range specifies the width of
the memory, and start and end addresses define its depth. The following is the syntax for memory
declaration in Verilog:

reg [ < range > ] < memory_name > [ < start_addr > : < end_addr > ];

The Verilog code in the following example declares two 1-bit wide signed variables of type reg
(x1 and x2) , two 1-bit unsigned variables of type wire ( y1 and y2 ), an 8-bit variable of type reg
( temp ), and an 8-bit wide and 1-Kbyte deep memory ram - local . Note that a double forward
slanted bar is used in Verilog for comments:

reg signed x1, x2; // 1-bit signed variables of type reg x1 and x2
wire y1, y2; // 1-bit variables of type wire, y1 and y2
reg [7:0] temp; // 8-bit reg temp
reg [7:0] ram_local [0:1023]; //8-bit wide and 1-Kbyte deep memory

A variable of type reg can also be initialized at declaration as shown here:

reg x1 = 1 ' b0; // 1-bit reg variable x1 initialize to 0 at declaration

2.5.7 Constants
Like variables, a constant in Verilog can be of any size and it can be written in decimal, binary, octal
or hexadecimal format. Decimal is the default format. As the constant can be of any size, its size is
usually written with 'd', 'b', 'o' or 'h' to specify decimal, binary, octal or hexadecimal, respectively.
For example, the number 13 can be written in different formats as shown in Table 2.2.

2.6 Four Levels of Abstraction

As noted earlier, Verilog is a hardware description language. The HW can be described at several
levels of detail. To capture this detail, Verilog provides the designer with the following four levels of
abstraction:

switch level

.

gate level

.

dataflow level

.

behavioral or algorithmic level.

.

A design in Verilog can be coded in a mix of levels, moving from the lowest abstraction of switch
level to the highly abstract model of behavioral level. The practice is to use higher levels of

Table 2.2 Formats to represent constants

13 or 4 0 d13 Decimal

4 0 b1101 Binary

4 0 o15

Octal

4 0 hd Hexadecimal