Unfolding and Folding of Architectures - Digital Design of Signal Processing Systems: A Practical Approach - page 345

The sampling frequency is the most critical constraint on a digital design. Usually the samples
fromanA/D converter are placed in a FIFO (first-in first-out) for processing. In a synchronous design
a ping-pong buffer may also be used. The required number of samples in the buffer generates an
activation signal for the digital component to start processing the buffer. For a design that processes
the discrete signal on a sample-by-sample basis, the sampling clock is also used as circuit clock for
the hardware design. Each newly acquired sample is stored in a register to be then processed by the
digital system.
The sampling frequency imposes strict constraints even if the sampled data is first stored in a
buffer. The designer, knowing the algorithmic constraint of processing a buffer of data of predefined
size, allocates required memory to FIFO or ping-pong buffers. The designer also architects the HW
to process this buffer of data before the next buffer is ready for processing. If the sampling rate is high
enough and is approximately equal to the best achievable circuit clock, mapping the algorithm as
FDA and synthesizing the design to achieve sampling clock timing is the most viable design option.
If the sampling clock is faster than an achievable circuit clock, then the designer needs to explore
parallel processing or pipelining options.
A software-defined radio (SDR) is an interesting application to explain different aspects of digital
design. The following section presents SDR architecture to illustrate how band-pass sampling
effectively reduces the requirement of sampling rate in digital communication applications. If the
designer decides to sample the signal following Nyquist sampling criteria, the design requires the
processing of more samples.

8.3.2 Software-defined Radio Architecture and Band-pass Sampling
In many designs, although strict compliance to the Nyquist sampling criterion requires the
processing of a large number of samples, the sampling frequency of the A/D converter can be
set to lower values without effecting algorithmic performance. This technique is called band-pass
sampling.
An ideal SDR receiver requires direct digital processing of the analog signal after the signal passes
through low-pass filtering and amplification. However, this implies a very high-speed A/D converter
and processing requirement as per the Nyquist sampling criterion. For many applications this
requires sampling and then processing of the signal at a few gigahertz range. In many designs the
received analog signal is first brought down to an intermediate frequency (IF) by a radio frequency
(RF) section and the signal is then digitized for processing by a mix of computing platforms such as
FPGAs, DSPs and GPPs. The design of a typical SDR is given in Figure 8.1.
In a digital receiver a baseband signal primarily consists of digitized compressed voice, video,
images or data that is modulated to take a limited bandwidth B 2f N , where f N is the highest

frequency content of the baseband signal. According to the frequency allocation assignment to a
particular band in the spectrum, this baseband signal at the transmitter is multiplied with a carrier of
high frequency f 0 . This process is shown in Figure 8.2. This carrier-ridden signal occupies the same
bandwidth B

¼

f L around f 0 , where f H and f L are the highest and lowest frequency content of this
signal. The transmitted signal spectrum is usually populated with adjacent channels from other
transmitters in the area. These channels have to be filtered out before the signal is digitized and
demodulated in the baseband.
At the receiver, the signal from the antenna is first passed through a band-pass filter and then to a
low-noise amplifier. This signal usually has some of the adjacent channels still left to be removed in
the digital domain with better and sharper filters. Usually the RF signal of interest has a very narrow
bandwidth and is centered at a very high frequency. Designing a narrowRF band-pass filter operating

¼ f H