Overview - Digital Design of Signal Processing Systems: A Practical Approach - page 12

clk

R 2

R 0

clk

R 1

clk

clk

critical path

Figure 1.8 Example of a digital synchronous hardware system

the arrival of the next active edge of the clock. As there are a number of paths in any digital
design, the longest path - the path that takes the maximum time for the signal to settle at the output -
is called the critical path, as noted in Figure 1.8. The critical path of the design should be smaller than
the permissible delay determined by the clock cycle.

1.8 Design Strategies
At the system level, the designer has a spectrum of design options as shown in Figure 1.9. It is very
critical for the systemdesigner tomake good design choices at the conceptual level because theywill
have a deep impact on the rest of the design cycle.At the system design stage the designer needs only
to draw a few boxes and take major design decisions like algorithm partitioning and target
technology selection.

General purpose
Microprocessor

Flexibilty

Digital Signal
Processor

GPP

Field
Programmable
Gate Array

DSP

Application
Specific
Integrated
Circuit

FPGA

Structured
ASIC

Power Consumption

ASIC

Figure 1.9 Target technologies plotted against flexibility and power consumption