Digital Signal Processing Reference
In-Depth Information
Exercise 6.5
In the following matrix of constant multiplication by a vector, design optimized HW using a CSE
technique:
2
4
3
5
2
4
3
5
2
4
3
5
y
0
y
1
y
2
y
3
7
32 7
x
0
x
1
x
2
x
3
14
64 3
¼
1
12
2
15
2
78 7
Exercise 6.6
Compute the dot product of two vectors
A
and
x
, where
A
is a vector of constants and
x
is a vector of
variable data with 4-bit elements. The coefficients of
A
are:
A
0
¼
13
; A
1
¼
11
; A
2
¼
11
; A
3
¼
13
Use symmetry of the coefficients to optimize the DA-based architecture. Test the design for the
following:
x
¼½
313
11 3
Exercise 6.7
Consider the following nine coefficients of an FIR filter:
h½n¼½
0
:
0456
0
:
1703
0
:
0696
0
:
3094
0
:
4521
0
:
3094
0
:
0696
0
:
1703
0
:
0456
Convert the coefficients into Q1.15 format. Consider x[n] to be an 8-bit number. Design the
following DA-based architecture:
1. a unified ROM-based design;
2. reduced size of ROM by the use of symmetry of the coefficients;
3. a DA architecture based on three parallel sub-filters;
4. a ROM-less DA-based architecture
Exercise 6.8
A second-order IIR filter has the following coefficients:
b ¼½
0
:
2483
0
:
4967
0
:
2483
a ¼
1
0
:
1842
0
:
1776
1. Convert the coefficients into 16-bit fixed-point numbers.
2. Design a DA-based architecture that uses a unified ROM as LUT. Consider x[n] to be an 8-bit
number. Use two LUTs, one for feedback and the other for feedforward coefficients.
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