Mapping on Fully Dedicated Architecture - Digital Design of Signal Processing Systems: A Practical Approach - page 162

Transformation
<V i ,E i >

A B C

A B C

→ <V t ,E t >

Figure 4.30 Mathematical transformation changing a DFG to meet design goals

Besides implementing a scheduler, the FSM also works well to implement protocols where a set
of procedures and synchronization is followed among various components of the system, as with
shared-bus arbitration. Further treatment to the subject of FSM is given in Chapter 9.

4.5.12 Transformations on a Dataflow Graph

Mathematical transformations convert a DFG to a more appropriate DFG for hardware implemen-
tation. These transformations change the implementation of the algorithm such that the transformed
algorithmbetter meets specific goals of the design. Out of a set of design goals the designer maywant
to minimize critical path delay or the number of registers. To achieve this, several transformations
can be applied to a DFG. Retiming, folding, unfolding and look-ahead are some of the transforma-
tions commonly used. These are covered in Chapter 7.
A transformation as shown in Figure 4.30 takes the current representation of DFG i ¼h

V i ,E i i
and translates it to another DFG t ¼h V t ,E t i with the same functionality and analytical behavior
but different implementation.

4.5.13 Dataflow Interchange Format (DIF) Language
Dataflow interchange format is a standard language for specifying DSP systems in terms of
executable graphs. Representation of an algorithm in DIF textually captures the execution model.
An algorithm defined in DIF format is extensible and can be ported across platforms for simulation
and for high-level synthesis and code generation. More information on DIF is given in [25].

4.6 Performance Measures
A DSP implementation is subject to various performance measures. These are important for
comparing design tradeoffs.

4.6.1 Iteration Period
For a single-rate signal processing system, an iteration of the algorithm acquires a sample from an
A/D converter and performs a set of operations to produce a corresponding output sample. The
computation of this output sample may depend on current and previous input samples, and in a
recursive system the earlier output samples are also used in this calculation. The time it takes the
system to compute all the operations in one iteration of an algorithm is called the iteration period.
It is measured in time units or in number of cycles.
For a generic digital system, the relationship between the sampling frequency f s and the circuit
clock frequency f c is important. When these are equal, the iteration period is determined by the