Digital Signal Processing Reference
In-Depth Information
Patterns and environmental configurations identified during simulation can
be used to test actual hardware during DVT and debug.
SI analysis identifies design vulnerabilities in the design and shows where the
debug activities should be targeted.
References
[1]
Huang, C. C., “Signal Integrity Modeling and Simulation Tools,” Proceedings of Design-
Con , 2004.
[2]
Beal, W., “Use the Right Models for the Simulation of Multi-Gigabit Channels,” Proceed-
ings of DesignCon , 2004.
[3]
Ramakrishnan, P., “CDNLive! Paper—Signal Integrity (SI) for Dual Data Rate (DDR) Inter-
face,” Cadence Designer Network , Silicon Valley, 2007.
[4]
Chandrakasan, A., et al., Design of High-Performance Microprocessor Circuits , New
York: IEEE Press, 2001.
[5]
Pompl, T., and M. Kerber, “Failure Distributions of Successive Dielectric Breakdown
Events,” IEEE Transactions on Device and Materials Reliability , Vol. 4, No. 2, June 2004.
[6]
Leblebici, Y., and S. M. Kang, Hot-Carrier Reliability of MOS VLSI Circuits , Boston, MA:
Kluwer Academic Publishers, 1993.
[7]
Dillinger, T. E., VLSI Engineering , Upper Saddle River, NJ: Prentice-Hall, 1988.
[8]
Groeseneken, G, “Hot Carrier Degradation and ESD in Submicrometer CMOS Technolo-
gies: How Do They Interact?” IEEE Transactions on Device and Materials Reliability , Vol.
1, No. 1, March 2001.
 
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