Digital Signal Processing Reference
In-Depth Information
Increase the spacing between traces.
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Move critical signals to a separate routing layer.
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Ensure that the signal reference planes also connect to the I/O drivers (do not
use an unrelated voltage plane as a reference).
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Add a properly grounded guard trace.
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Minimize the coupled length.
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Make the victim trace as low impedance as is practical.
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Lengthen the signal rise time (make it slower).
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Reduce the aggressor signal voltage swing.
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Properly terminate the aggressor and victim traces.
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Adjust timing so that the crosstalk event does not cause false triggering (this
reduces the effect but does not eliminate the actual coupled voltage).
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Adjust timing so that multiple aggressors do not simultaneously couple onto
a victim (this reduces the peak voltage coupled onto the victim).
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16.3 Reducing Refl ections
Reflections occur when the load impedance does not match the transmission line
impedance.
Termination is required if the line is electrically long. Do the following when
excessive ringing, overshooting, and ringback are present on a net that has been
terminated:
Verify that the manufactured trace impedance is the expected value and that
it matches the termination.
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Perform an odd/even mode analysis to determine if the difference between
the odd/even impedances is high. If so, consider increasing the spacing be-
tween traces or adding a guard trace to control the impedance under switch-
ing conditions.
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On multidrop nets perform a simulation analysis to determine the best way
to connect the loads and to find the optimum termination type and value.
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Reduce the I/O cell drive strength to decrease the launched rise time.
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Shorten the trace length.
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If properly matching the load impedance to the transmission line impedance
is not possible (for example, a large lumped capacitive load), eliminate mul-
tiple reflections by ensuring that the driver impedance closely matches the
line impedance.
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Make termination more effective by breaking up a multiload net into several
identical copies, each of which is driven from separate pins on the ASIC.
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Ensure that series termination resistors are placed close to the driving pin.
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Ensure that parallel terminations are properly connected to the load.
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