Digital Signal Processing Reference
In-Depth Information
R
S
1
TT1
R
S
2
TX
T2
R
S
3
T3
C
L
3
C
L
2
C
L
1
(a)
R
term
1
TT1
R
term
2
TX
T2
R
term
3
T3
V
term
C
L
3
C
L
2
C
L
1
(b)
Figure 12.9
(a) Series. (b) Parallel multiload point-to-point termination schemes.
Series termination is shown in Figure 12.9(a), and parallel termination is shown
in Figure 12.9(b), where we see that three loads are connected by three transmis-
sion lines to the driver, and in both cases the driver must simultaneously launch
current down the three lines. This effectively places them in parallel. For instance,
if the impedance of each line is 60
. Unless
the driver has a very low output impedance, it may not be capable of launching a
voltage high enough to reach the receiver switch point into such a low impedance.
With the series termination scheme, reflections from the impedance mismatch
at the load will increase the received voltage, provided that the load impedance is
very high. This means that the driver need not launch as high a voltage and can be
weaker than in the parallel terminated case.
However, with this scheme the relative lengths of
T
1,
T
2, and
T
3 can become
important. If the transmission lines are the same length, the reflections from all of
the lines simultaneously arrive at the near end, and the waveform is the same at
each load. However, if the lengths differ, the reflections arrive back at the driver at
different times, which then combine in complex ways before they are relaunched to
the loads. This alters the wave shape at each load. An example of this for the series
termination scheme is shown in Figure 12.10.
In this example the driver has a nominal impedance of 12
Ω
the driver experiences a load of 20
Ω
and is connected
to a 3.3-V source. The driver “fans out” a common clock to three loads that are
located at different distances. Series resistors
R
S
1
through
R
S
3
are each 22
Ω
Ω
.
