Biology Reference
In-Depth Information
I
on
I
D
V
DS
V
GS
I
off
V
GS
(V)
Figure 6.3.
Typical drain current vs. gate-source voltage characteristics
for a TFT. The circuit elements are indicated in the inset. The curve is for
fixed
V
DS
.
a conductive path (channel) is established between the source and
drain.Hence,theTFTcanoperateasaswitch,controlledbythegate
voltage.
Despite of its much reduced manufacturing cost and versatile
form factor, the main drawback of TFTs compared with single
crystalline silicon devices is the low electrical performance. This is
a direct result of the low electron mobility of the semiconductor
material employed for TFT fabrication.
InthecaseoftheamorphoussiliconTFT,theconductingchannel
is created in the amorphous silicon layer, in which the long range
order of lattice is absent and the atoms form a continuous random
network. Due to this disordered nature of the material, amorphous
silicon has a high level of defects which is normally passivated
and reduced by hydrogen to prevent anomalous electrical behavior.
Consequently the electron mobility is reduced to 1-10 cm
2
V
−
1
s
−
1
,
compared with a few hundred for single crystalline silicon. This
essentially ruled out amorphous silicon TFT for analog circuits and
high speed logic circuits, where high internal gain and large fan out
of transistors are required.
