Biology Reference
In-Depth Information
CMOS transistor today has gate dimensions as small as 45 nm and
working frequencies up to a few GHz. On the other hand, with the
high purity substrate material and advanced fabrication process,
the yield of the CMOS process is extremely high, making it possible
to include hundreds of millions of transistors in a single device.
Although the silicon MOSFET transistor does not have the best
noiseandspeedperformanceasothersemiconductordevicesinthe
field of electronics, the well established CMOS technology certainly
makes it an obviouschoicefor biosensorapplications.
Despite the high performance of CMOS, its manufacturing
process requires very high-cost equipment, clean room facilities,
and expensive high purity single-crystal silicon wafers. Those
limitations have set up the barrier to further reduce the fabrication
costs and hindered the use of CMOS technology in large area
electronics such as displays.
6.2.1.2 Thin-film transistors
Besides using a CMOS process, which employs single crystalline
silicon as a substrate, FETs can also be fabricated on thin films
of semiconductors such as amorphous (
α
-Si) or polycrystalline
silicon. A direct benefit of these technologies is to replace expensive
single crystalline silicon wafers with cheaper insulators supporting
a thin layer of deposited semiconductor as substrate, which
substantiallyreducesthemanufacturingcosts.Athin-filmtransistor
isametal-insulator-semiconductorfield-effecttransistor(MISFET)
fabricated on an insulating substrate by employing entirely thin-
film constituents. The total thickness of the transistor is normally
less than 1
μ
m [12]. There are variations in TFT design, but the
basic device structures for both amorphous silicon and polycrys-
talline silicon technologies are depicted in Figs. 6.2b and 6.2c,
respectively.
NormallyTFTsareoperatedlikeenhancement-modeMOSFETs.A
typical drain current
I
D
vs. gate voltage
V
GS
characteristic is shown
in Fig. 6.3. When the gate voltage
V
GS
(with respect to the source) is
low, very little current flows between the source and drain, because
of the high resistance of the active layer. When the gate voltage is
high,chargeisinducedneartheoxide-semiconductorinterface,and
