Hardware Reference
In-Depth Information
Fig. 7.4 ( a ) FSM extracted
from the sequential network
of Fig. 7.3 ;( b ) Automaton
that recognizes the language
of the FSM
a
b
1 / 0
10
00
00
1
0 / 0
00
0 / 1
0
01
dc
01
01
0 / 0
−/ 1
1
1 / 1
11
0
1 / 0
10
11
10
and two latches, with current state variables cs Dfcs 1 ;cs 2 g and next state variables
ns Dfns 1 ;ns 2 g . The initial state of the latches is state .00/ . The next state functions
of the latches are T 1 .i; cs/ D i:cs 2
and T 2 .i; cs/ D i C cs 1 . The two parts of the
transition relation are
T 1 .i; cs; ns 1 / D Œns 1 T 1 .i; cs/ D Œns1 i:cs 2 D ns 1 :i:cs 2 C ns 1 :.i C cs 2 /
and
T 2 .i; cs; ns 2 / D Œns 2 T 2 .i; cs/ D Œns 2 .i Ccs 1 / D ns 2 :.i Ccs 1 /Cns 2 :i:cs 1 /:
The single output relation is
O.cs 1 ;cs 2 ;o/ D Œo .cs 1 ˚ cs 2 /:
The states of the automaton in Fig. 7.4 b are labeled with the latch values
.cs 1 ;cs 2 / . Transitions (arcs) are labeled with .i; o/ values. Thus, the transition from
state .00/ under input 0 is to state .01/ . The output produced by the network in this
case is 0 . So the label of this transition is 00 (equal to 0=0 using the conventional
FSM labeling, as in Fig. 7.4 a). This automaton is not complete. Thus, the transition
from .00/ under input .11/ is not defined. The double-circled states of the automaton
are accepting. The additional (single-circled) state .DC / , added for completion, is
not accepting. DC has a universal self-loop and all transitions that were originally
undefined (e.g., from .00/ under input .11/ ) are directed to DC .
 
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