Digital Signal Processing Reference
In-Depth Information
pipelining IIR digital filters. In order to pipeline an IIR filter, consider a filter
x
k
¼
a
3
x
k
3
þ
a
4
x
k
4
þ
u
k
1
:
ð
5
:
31
Þ
The IIR filter defined in (5.31) can be represented using the hardware multipliers as
a
3
^
þ
z
1
x
k
^
^
x
k
¼ð
x
k
^
a
4
Þ
þ
u
k
:
ð
5
:
32
Þ
Figure 5.10 shows the hardware equivalent of (5.32); adders (
þ
) and multipliers
(
^
) are enclosed by dotted lines. This is to indicate that certain IIR filters of this
class can be pipelined. Taking this as a hint, we proceed as follows.
Figure 5.10 Pipelining of an IIR filter
Consider a second-order filter
H
ð
z
Þ¼
1
A
ð
z
Þ
where A
ð
z
Þ¼
1
rpz
1
þ
r
2
z
2
;
ð
5
:
33
Þ
in which p
¼
2 cos
is required to be pipelined. We have demonstrated that all FIR
filters can be pipelined and only some IIR filters can be pipelined. With this
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