Digital Signal Processing Reference
In-Depth Information
State
S
1
01
0/ 011
1/ 100
0/ 010
0/ 001
State
S
State
S
0
2
10
00
0/ 000
1/111
1/110
State
S
3
11
1/101
FIGURE 10.44.
State diagram for encoding.
000
000
000
000
000
011
011
011
111
111
111
111
111
100
100
100
001
001
001
001
110
110
110
110
010
010
010
101
FIGURE 10.45.
Trellis diagram for encoding.
101
101
Trellis Diagram
The corresponding trellis diagram for the state diagram is shown in Figure 10.45.
The four possible states of the encoder are shown as four rows of horizontal dots.
There is one column of four dots for the initial state of the encoder and one for
each time instant during the message. The solid lines connecting the dots in the
diagram represent state transitions when the input bit is a 0. The dotted lines rep-
resent transitions when the input bit is a 1. For this encoding scheme, each encod-
ing state at time
n
is linked to two states at time
n
1. The Viterbi algorithm is used
for decoding this trellis-coded information bits by expanding the trellis over the
received symbols. The Viterbi algorithm reduces the computational load by taking
advantage of the special structure of the trellis codes.
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