Architecture and Instruction Set of the C6x Processor - Digital Signal Processing and Applications with the C6713 and C6416 DSK - page 78

TABLE 3.1 Memory Map

Memory Block Description Block Size (Bytes) Hex Address Range

Internal RAM (L2) 192 K 0000 0000-0002 FFFF

Internal RAM/cache 64 K 0003 0000-0003 FFFF

Reserved 24 M-256 K 0004 0000-017F FFFF

External memory interface (EMIF) registers 256 K 0180 0000-0183 FFFF

L2 registers 128 K 0184 0000-0185 FFFF

Reserved 128 K 0186 0000-0187 FFFF

HPI registers 256 K 0188 0000-018B FFFF

McBSP 0 registers 256 K 018C 0000-018F FFFF

McBSP 1 registers 256 K 0190 0000-0193 FFFF

Timer 0 registers 256 K 0194 0000-0197 FFFF

Timer 1 registers 256 K 0198 0000-019B FFFF

Interrupt selector registers 512 019C 0000-019C 01FF

Device configuration registers 4 019C 0200-019C 0203

Reserved 256 K-516 091C 0204-019F FFFF

EDMA RAM and EDMA registers 256 K 01A0 0000-01A3 FFFF

Reserved 768 K 01A4 0000-01AF FFFF

GPIO registers 16 K 01B0 0000-01B0 3FFF

Reserved 240 K 01B0 4000-01B3 FFFF

I2C0 registers 16 K 01B4 0000-01B4 3FFF

I2C1 registers 16 K 01B4 4000-01B4 7FFF

Reserved 16 K 01B4 8000-01B4 BFFF

McASP0 registers 16 K 01B4 C000-01B4 FFFF

McASP1 registers 16 K 01B5 0000-01B5 3FFF

Reserved 160 K 01B5 4000-01B7 BFFF

PLL registers 8 K 01B7 C000-01B7 DFFF

Reserved 264 K 01B7 E000-01BB FFFF

Emulation registers 256 K 01BC 0000-01BF FFFF

Reserved 4 M 01C0 0000-01FF FFFF

QDMA registers 52 0200 0000-0200 0033

Reserved 16 M-52 0200 0034-02FF FFFF

Reserved 720 M 0300 0000-2FFF FFFF

McBSP0 data port 64 M 3000 0000-33FF FFFF

McBSP1 data port 64 M 3400 0000-37FF FFFF

Reserved 64 M 3800 0000-3BFF FFFF

McASP0 data port 1 M 3C00 0000-3C0F FFFF

McASP1 data port 1 M 3C10 0000-3C1F FFFF

Reserved 1 G + 62 M 3C20 0000-7FFF FFFF

EMIF CE0* 256 M 8000 0000-8FFF FFFF

EMIF CE1* 256 M 9000 0000-9FFF FFFF

EMIF CE2* 256 M A000 0000-AFFF FFFF

EMIF CE3* 256 M B000 0000-BFFF FFFF

Reserved 1 G C000 0000-FFFF FFFF

* The number of EMIF address pins (EA[21:2]) limits the maximum addressable memory (SDRAM)
to 128 MB per CE space.
Source : Courtesy of Texas Instruments.