Application Specific Instruction Set DSP Processors - Signal Processing Systems - page 660

2 ASIP Design Flow for DSP Applications

ASIP DSP design can be divided into three parts, as illustrated in Fig. 2 . Thefirst
part is the “ASIP architecture design” including architecture exploration, design of
the assembly instruction set and the instruction set architecture. The second part
is the “design of programming tools for ASIP FW (firmware) coding”, including
compiler, assembler, linker, and instruction set simulator. The third part is the “ASIP
firmware design” including the design of benchmarking codes and application
codes. The divided three parts can be identified in the ASIP design flow depicted
in Fig. 3 . This ASIP design flow gives a guidance of ASIP design from requirement
specification down to the microarchitecture specification and design.
Following the ASIP hardware design flow in Fig. 3 , the starting point of an ASIP
design is to specify the requirements including application coverage, performance,
and costs. The inputs of the design are product specification and the collection
of underlying standards. By analyzing markets, competitors, technologies, and
standards, the output of the step is of course the product requirements including
the function coverage, performance, and costs.

ASIP
architecture

ASIP FW
design
tools

ASIP FW
design

Fig. 2 Knowledge required
in ASIP design

90%-10% locality, identify critical
path, check function coverage

Application source
code profiling

HW requirement spec

ASIP architecture proposal

Iterative design process:
Design of assembly instruction set and
the instruction set simulator.

Find a reference
instruction sets

Benchmarking, cost trade off, and architecture design

Microarchitecture specification and RTL coding

Fig. 3 DSP ASIP hardware design flow