Digital Signal Processing Reference
In-Depth Information
(
)
The TIA is a linear amplifier that takes an input current i in
t
and generates an
(
)
output voltage v o
t
where
A v
v o (
t
)=
i in (
t
)
R f
(10)
1
+
A v
A v
where R f
A v is the transimpedance (in Ohms) and A v is the open loop gain of
the TIA amplifier kernel. Typical values of R f reside in the range 800
1
+
.
The 3 dB bandwidth of the TIA f c , tia is typically designed to be approximately
70% of the symbol rate in order to achieve a balance between ISI and SNR. The
performance of the TIA is also specified in terms of its sensitivity.
A VGA is typically used to boost the receive signal level if subsequent processing
will include more than a simple CDR. Linearity of the VGA (for back-plane),
and the detector-TIA-VGA combination (for an optical link) is important if an
ADC is used, in order to preserve the information. The VGA can be modeled as
a transconductance stage with an output load resistor R L and an output capacitance
C L . The low-frequency gain of such a stage is given by
Ω
to 2 k
Ω
A v =
g m R L
(11)
where g m is the transconductance of the transistor, and its 3 dB bandwidth is
given by
1
=
R L C L .
f c , vga
(12)
2
π
2.3.3
Analog-to-Digital Converter (ADC)
An ADC is typically modeled as an ideal sampler followed by a memoryless
quantizer. Such models do not account for the many non-idealities that exist in
practice especially in the multi-GHz regime. A practical ADC consists of a band-
limited front-end, a sampler and a quantizer, and may exhibit hysteresis and other
pattern-dependent behavior. Non-idealities of the ADC are often aggregated in terms
of the effective number of bits (ENOB) of the ADC, which attempts to quantify the
resulting quantization noise as if it were additive and independent of the input. At
10 GS/s, ADCs with 3-to-6 bits of resolution have been produced for both optical
and back-plane channels using SiGe bipolar processes [ 3 , 9 ] (optical only), and more
recently in CMOS for back-plane [ 24 ] , optical [ 25 ] , and both [ 22 ] , illustrating the
strong emergence of signal processing enhanced solutions for both link types.
2.3.4
Clock-Recovery Unit
Design of a high-performance CRU is critical in high-speed links. Unlike other
communication links such as DSL or wireless, the CRU in back-plane and optical
can dominate the complexity of the receiver. This is very true for a CDR-based
 
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