Digital Signal Processing Reference
In-Depth Information
Pulse width: >100 ns
Input impedance: 10 k, DC coupled
Latency:
Burst: <100 ns (typical)
Sweep: <10
µ
s (typical)
Jitter (rms)
Burst: 1 ns; except pulse, 300 ps
Sweep: 2.5
µ
s
•
Trigger output
Level: TTL compatible into 50
Pulse width: >450 ns
Maximum rate: 1 MHz
Fanout: 4 HP33250As
A.2.11
Clock Reference
•
Phase Offset
Range: -360° to +360°
Resolution: 0.001°
•
External reference input
Lock range: 10 MHz ± 35 kHz
Level: 100 mVpp to 5 Vpp
Impedance: 1 knominal, AC coupled
Lock time: <2 s
•
Internal reference output
Frequency: 10 MHz
Level: 632 mV pp (0 dbm), nominal
Impedance: 50 nominal, AC coupled
A.2.12
Sync Output
Level: TTL compatible into > 1 k
Impedance: 50 nominal
A.2.13
General Specifications
Power supply: 100-240 V, 50-60 Hz or 100-127 V, 50-400 Hz
Power consumption: 140 VA
Operating temp: 0°C to 55°C
