Hardware Reference
In-Depth Information
The Core i7 instruction set is a mixture of instructions that make sense in
32-bit mode and those that hark back to its former life as an 8088. In Fig. 5-33 we
show a small selection of the more common integer instructions that compilers and
programmers are likely to use these days. This list is far from complete, as it does
not include any floating-point instructions, control instructions, or even some of
the more exotic integer instructions (such as using an 8-bit byte in AL to perform
table lookup). Nevertheless, it does give a good feel for what the Core i7 can do.
Many of the Core i7 instructions reference one or two operands, either in regis-
ters or in memory. For example, the two-operand
ADD
instruction adds the source
to the destination and the one operand
INC
instruction increments (adds 1 to) its op-
erand. Some of the instructions have several closely related variants. For example,
the shift instructions can shift either left or right and can treat the sign bit specially
or not. Most of the instructions have a variety of different encodings, depending
on the nature of the operands.
In Fig. 5-33, the
SRC
fields are sources of information and are not changed. In
contrast, the
DST
fields are destinations and are normally modified by the instruc-
tion. There are some rules about what is allowed as a source or a destination, vary-
ing somewhat erratically from instruction to instruction, but we will not go into
them here. Many instructions have three variants, for 8-, 16-, and 32-bit operands,
respectively. These are distinguished by different opcodes and/or a bit in the in-
struction. The list of Fig. 5-33 emphasizes the 32-bit instructions.
For convenience, we have divided the instructions into several groups. The
first group contains instructions that move data around the machine, among regis-
ters, memory, and the stack. The second group does arithmetic, both signed and
unsigned. For multiplication and division, the 64-bit product or dividend is stored
in
EAX
(low-order part) and
EDX
(high-order part).
The third group does Binary Coded Decimal (BCD) arithmetic, treating each
byte as two 4-bit
nibbles
. Each nibble holds one decimal digit (0 to 9). Bit combi-
nations 1010 to 1111 are not used. Thus a 16-bit integer can hold a decimal num-
ber from 0 to 9999. While this form of storage is inefficient, it eliminates the need
to convert decimal input to binary and then back to decimal for output. These in-
structions are used for doing arithmetic on the BCD numbers. They are heavily
used by COBOL programs.
The Boolean and shift/rotate instructions manipulate the bits in a word or byte
in various ways. Several combinations are provided.
The next two groups deal with testing and comparing, and then jumping based
on the results. The results of test and compare instructions are stored in various
bits of the
EFLAGS
register.
Jxx
stands for a set of instructions that conditionally
jump, depending on the results of the previous comparison (i.e., bits in
EFLAGS
).
The Core i7 has several instructions for loading, storing, moving, comparing,
and scanning strings of characters or words. These instructions can be prefixed by
a special byte called
REP
, which cause them to be repeated until a certain condition
is met, such as
ECX
, which is decremented after each iteration, reaching 0. In this
