Hardware Reference
In-Depth Information
bridge (possibly part of the bridge chip itself or integrated directly into the proc-
essor). Each I/O chip has a dedicated point-to-point connection to the switch.
Each connection consists of a pair of unidirectional channels, one to the switch and
one from it. Each channel is made up of two wires, one for the signal and one for
ground, to provide high noise immunity during high-speed transmission. This ar-
chitecture has replaced the old one with a much more uniform model, in which all
devices are treated equally.
The PCI Express architecture differs from the old PCI bus architecture in three
key ways. We have already seen two of them: a centralized switch vs. a multidrop
bus and a the use of narrow serial point-to-point connections vs. a wide parallel
bus. The third difference is more subtle. The conceptual model behind the PCI
bus is that of a bus master issuing a command to a slave to read a word or a block
of words. The PCI Express model is that of a device sending a data packet to an-
other device. The concept of a
packet
, which consists of a header and a payload,
is taken from the networking world. The
header
contains control information,
thus eliminating the need for the many control signals present on the PCI bus. The
payload
contains the data to be transferred. In effect, a PC with PCI Express is a
miniature packet-switching network.
In addition to these three major breaks with the past, there are also several
minor differences as well. Fourth, an error-detecting code is used on the packets,
providing a higher degree of reliability than on the PCI bus. Fifth, the connection
between a chip and the switch is longer than it was, up to 50 cm, to allow system
partitioning. Sixth, the system is expandable because a device may actually be an-
other switch, allowing a tree of switches. Seventh, devices are hot pluggable,
meaning that they can be added or removed from the system while it is running.
Finally, since the serial connectors are much smaller than the old PCI connectors,
devices and computers can be made much smaller. All in all, PCI Express is a
major departure from the PCI bus.
The PCI Express Protocol Stack
In keeping with the model of a packet-switching network, the PCI Express sys-
tem has a layered protocol stack. A
protocol
is a set of rules governing the conver-
sation between two parties. A protocol stack is a hierarchy of protocols that deal
with different issues at different layers. For example, consider a business letter. It
has certain conventions about the placement and content of the letterhead, the re-
cipient's address, the date, the salutation, the body, the signature, and so on. This
might be thought of as the letter protocol. In addition, there is another set of con-
ventions about the envelope, such as its size, where the sender's address goes and
its format, where the receiver's address goes and its format, where the stamp goes,
and so on. These two layers and their protocols are independent. For example, it
is possible to reformat the letter but use the same envelope or vice versa. Layered
