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T j
T DBC
T case
T hs
R th-die
R th-hs T amb
R th-case
R th-DBC
C th-DBC
P diss
C th-die
C th-case
C th-hs
Equivalent T-model (Cauer-type)
R th1
R th2
R th3
R th4
T DBC
T j
T case
T hs
T amb
C th3
C th4
C th2
C th1
P diss
Equivalent p-model (Foster-type)
Figure 6.20 Thermal modelling equivalent circuit representations
In the transistor stack, a linear approximation to thermal equivalent circuit
parameters can be made by assuming that heat flow is restricted within the
dimensions of the stack components (layers). Thermal capacitance is determined in
a similar manner by taking the mass of the layer and its specific thermal capacity.
Equation (6.26) describes the process for calculating the thermal equivalent circuit
(T-type) model parameters:
L
l th S
R th ¼
(K = W, Ws = K)
ð 6 : 26 Þ
C th ¼ c r SL
where K is Kelvin, l th (W/K-m) the thermal conductivity, c (Ws/K-kg) the specific
thermal capacitance and S (m 2 ) the cross-sectional area of the layer of length, L .
Table 6.5 is a tabulation of material properties for common power electronic
components.
Table 6.5 is useful in developing parameter data for power electronic system
transistor stacks and other integrated power electronic systems. Figure 6.21 is an
illustration of the power stage for a 42 V power inverter based on International
Rectifier SuperTab devices. The SuperTab is rated 75 V, 300 A, 0.25 m W per
switch [16,17]. In this application the power inverter is capable of sourcing 574 A
into a 42 V M/G.
More conventional power electronics packaging relies on laminated bus struc-
tures, integrated power electronic modules and systems on chip. The classical
packaging configuration for today's hybrid propulsion systems is illustrated in
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