Digital Signal Processing Reference
In-Depth Information
A LL S OURCE C ODE FOR THE B OOK ' S D ESIGNS IS AVAILABLE ON THE DVD.
MATERIALS CAN BE FOUND IN THE \ BOOKSOFT _ FE \ B OARD \C HAP X
DIRECTORIES FOR EACH SPECIFIC BOARD ( I . E ., DE1, DE2, UP3, UP2)
4.9 Laboratory Exercises
1. Simulate the initial design without the switch debounce circuit by setting up an initial
reset pulse and a periodic 200 ns clock input in the simulator. In sequential simulations,
turn on the setup and hold time violation detection simulator setting option before
running the simulator. This will check for flip-flop timing problems that would otherwise
go undetected in the simulation. Adjust the reset pulse so that it changes right before the
clock edge and run another simulation to see if you can produce a setup or hold violation.
2. Modify the counter circuit so that it counts down or up depending on the state of a switch
input. See Table 2.4 for the pin assignment for the new switch input.
3. Modify the counter circuit so that it parallel loads a count value from the four switches on
the FPGA board when PB2 is pushed. Zero out the low four counter bits during a load.
Since the switch inputs are only used when PB2 is hit, they do not need to be debounced.
See Table 2.4 for the pin assignments for the new switch inputs.
4. Build a stopwatch with the following modifications to the design. Disconnect the counter
clk line and connect it to the clock_10hz pin on the clock_div symbol. Clock a toggle
flip-flop with the pb_debounced output. A toggle flip-flop, tff, can be found in the prim
symbol library. A toggle flip-flop's output changes state every time it is clocked. Connect
the output of the toggle flip-flop to a new count enable input added to the counter with
the megawizard. The count should start and stop when PB1 is hit. Elapsed time in tenths
of seconds should be displayed in hexadecimal. Pushing PB2 should reset the stopwatch.
5. The elapsed time in the stopwatch from problem 3 is displayed in hexadecimal. Replace
the counter with two cascaded binary-coded-decimal (BCD) counters so that it displays
the elapsed time as two decimal digits.
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