Digital Signal Processing Reference
In-Depth Information
5. Implement one of the FPGA robotics projects from Chapter 13 using a Nios II processor
running C code. See problem 1 for robot interface suggestions.
6. Design an automatic setback HVAC thermostat using the FPGA. Interface a temperature
sensor to the FPGA. Some temperature sensors are available with digital outputs that
would not require a separate analog-to-digital IC. Display the current time, temperature,
heat, fan, and A/C status, and the temperature settings in the LCD. Use the pushbuttons
to change the temperature settings and setback times. Use the LEDs to indicate the heat,
A/C, and fan control outputs from the thermostat. You can heat the temperature sensor
with your finger to cycle the thermostat and cool it with ice or an aerosol spray can of
dust off cleaner.
7. Interface a PS/2 keyboard or mouse to the Nios II processor using PIO ports. Write
software to demonstrate the new keyboard or mouse interface. Display the output on the
LCD or the UART. There are two major options to consider, use the keyboard and mouse
cores from Chapter 11 or do everything in software.
8. Use the video sync core and character generation ROM from Chapter 10 to add a video
text display to the Nios processor. Add a dual port memory to store a screen full of
characters. Write charcters to the dual port memory from the Nios II processor using PIO
ports added to the Nios II design. The video system constantly reads the characters out of
the dual port memory and then uses the character generation ROM to generate the video
display. Write a software driver for the video display and attach a monitor to the FPGA's
VGA connector to demonstrate your design.
9. After solving the previous two problems, develop software for a video game that uses the
mouse or keyboard for input and displays output on the monitor. If you need graphics for
your game, consider replacing the character memory and text display with a larger
memory containing only pixels used in a graphics display. Keep in mind that the internal
FPGA memory is limited.
10. Add a custom instruction to the Nios II processor designed to speed up a particular
application area. See the Nios II Custom Instruction User Guide . Demostrate the speedup
obtained with the new instruction by running the application with and without the new
instruction.
11. Interface the dual port video display memory used in one of the earlier problems directly
to the Avalon system bus instead of using PIO ports. See the Avalon Interface
Specification Manual .
12. Program the FPGA's serial flash device so that your Nios II hardware design loads
automatically at power up. See Appendix E for instructions on programming the FPGA's
serial flash configuration chip.
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