Digital Signal Processing Reference
In-Depth Information
Table 11.4 (Continued) Scan Codes for PS/2 Keyboard.
No Shift or
Num Lock
Key
Shift*
Num Lock On
# Make Break Make Break Make Break
76 E0 70 E0 F0 70 E0 F0 12 E0 70 E0 F0 70 E0 12 E0 12 E0 70 E0 F0 70 E0 F0 12
76 E0 71 E0 F0 71 E0 F0 12 E0 71 E0 F0 71 E0 12 E0 12 E0 71 E0 F0 71 E0 T0 12
79 E0 6B E0 F0 6B E0 F0 12 E0 6B E0 F0 6B E0 12 E0 12 E0 6B E0 F0 6B E0 F0 12
80 E0 6C E0 F0 6C E0 F0 12 E0 6C E0 F0 6C E0 12 E0 12 E0 6C E0 F0 6C E0 F0 12
81 E0 69 E0 F0 69 E0 F0 12 E0 69 E0 F0 69 E0 12 E0 12 E0 69 E0 F0 69 E0 F0 12
83 E0 75 E0 F0 75 E0 F0 12 E0 75 E0 F0 75 E0 12 E0 12 E0 75 E0 F0 75 E0 F0 12
84 E0 72 E0 F0 72 E0 F0 12 E0 72 E0 F0 72 E0 12 E0 12 E0 72 E0 F0 72 E0 F0 12
85 E0 7D E0 F0 7D E0 F0 12 E0 7D E0 F0 7D E0 12 E0 12 E0 7D E0 F0 7D E0 F0 12
86 E0 7A E0 F0 7A E0 F0 12 E0 7A E0 F0 7A E0 12 E0 12 E0 7A E0 F0 7A E0 F0 12
89 E0 74 E0 F0 74 E0 F0 12 E0 74 E0 F0 74 E0 12 E0 12 E0 74 E0 F0 74 E0 F0 12
* When the left Shift Key is held down, the 12 FO 12 shift make and break is sent with the other scan
codes. When the right Shift Key is held down, 59 - FO 59 is sent.
Key Scan Code Shift Case *
# Make Break Make Break
95 E0 4A E0 F0 4A E0 F0 12 E0 4A E0 12 F0 4A
* When the left Shift Key is held down, the 12 FO 12 shift make and break is sent with the other scan
codes. When the right Shift Key is held down, 59 FO 59 is sent. When both Shift Keys are down, both
sets of codes are sent with the other scan codes.
Key
Scan Code
Control Case, Shift Case
Alt Case
#
Make
Break
Make
Break
Make
Break
E0 12 E0 7C
E0 F0 7C E0 F0 I2
E0 7C
E0 F0 7C
84
F0 84
124
Key #
Make Code
Control Key Pressed
126 *
El 14 77 El F0 14 F0 77
E0 7E E0 F0 7E
* This key does not repeat
11.6 The Keyboard FPGAcore
The following VHDL code for the keyboard FPGAcore shown in Figure 11.4
reads the scan code bytes from the keyboard. In this example code, no
command is ever sent to the keyboard, so clock and data are always used as
inputs and the keyboard power-on defaults are used.
To send commands, a more complex bi-directional tri-state clock and data
interface is required. The details of such an interface are explained in later
sections on the PS/2 mouse. The keyboard powers up and sends the self-test
code AA and 00 to the FPGA chip before it is downloaded.
