Digital Signal Processing Reference
In-Depth Information
ABout
DA0, DB0
Ai n
1d
00
Bin
S1, S2
DA0, DB0
01
DA0, DB0,
Sw1 , S w2
d1
00
S2 , S 4
00
d1
10
S1 , S 3
Bstop
10
Astop
DA0
DB0,
Sw1 , S w2
0
1
S4
1
0
S3
Figure 8.5
Example Train Controller ASM Chart.
S1 = 0
S2 = 0
ABout
DA0, DB0
S2 = d
S4 = 1
S1 = d
S3 = 1
S2 = 0
S4 = 0
S1 = 0
S3 = 0
Bin
S1 = 1
S2 = d
S1 = 0
S2 = 1
Ain
DA0, DB0,
Sw1, Sw2
DA0, DB0
S4 = 1
S2 = 1
S4 = 0
S3 = 1
S1 = 1
S3 = 0
Astop
Bstop
DB0,
Sw1, Sw2
DA0
S4 = 0
S3 = 0
Figure 8.6
Example Train Controller State Diagram.
