Digital Signal Processing Reference
In-Depth Information
Verilog Memory Model - Example Two
The second example shows the use of Altera's ALTSYNCRAM megafunction
to implement a block of memory. For more information on the megafunctions
see the online help guide in the Quartus II tool. In single port mode, the
ALTSYNCRAM memory can do either a read or a write operation in a single
clock cycle since there is only one address bus. In dual port mode, it can do
both a read and write. If this is the only memory operation needed, the
ALTSYNCRAM function produces a more efficient hardware implementation
than synthesis of the memory in Verilog. In the ALTSYNCRAM megafunction,
the memory address must be clocked into a dedicated address register located
inside the FPGA's synchronous memory block. Asynchronous memory
operations without a clock can cause timing problems and are not supported on
many FPGAs including the Cyclone.
module
amemory
(
write_data, write_enable, address, clock, read_data
);
input [7:0]
write_data
;
input
write_enable
;
input [2:0]
address
;
input
clock
;
output [7:0]
read_data
;
wire [7:0]
sub_wire0
;
wire [7:0]
read_data
=
sub_wire0
[7:0];
/* Use Altera Altsyncram function for memory */
altsyncram altsyncram_component
(
.wren_a
(
write_enable
),
.clock0
(
clock
),
.
address_a
(
address
),
.data_a
(
write_data
),
.q_a
(
sub_wire0
));
defparam
altsyncram_component.operation_mode = "SINGLE_PORT",
/* 8 data bits, 3 address bits, and no register on read data */
altsyncram_component.width_a = 8,
altsyncram_component.widthad_a = 3,
altsyncram_component.outdata_reg_a = "UNREGISTERED",
/* Reads in mif file for initial memory data values (optional) */
altsyncram_component.init_file = "memory.mif"
;
endmodule
On the Cyclone FPGA chip, the memory can be implemented using the M4K
memory blocks, which are separate from the FPGA's logic cells. In the Cyclone
EP1C6 chip there are 20 M4K RAM blocks at 4Kbits each for a total of 92,160
bits. In the Cyclone EP1C12 there are 52 M4K blocks for a total of 239,616
bits. Each M4K block can be setup to be 4K by 1, 2K by 2, 1K by 4, 512 by 8,
256 by 16,256 by 18, 128 by 32 or 128 by 36 bits wide. The
Tools Megawizard
Plug-in Manager
feature is useful to configure the
Altsyncram parameters.
