Models for Bridging Defects Test and Diagnosis - Models in Hardware Testing - page 60

with good results. As the number of possible bridges to be considered is huge, most
of the works relied on a set of limited realistic bridges obtained by extraction tools.
Nevertheless, although this idea has been demonstrated to be effective, most of the
extractors only identify possible bridges between nets in the same metal layer. How-
ever, reality has shown that bridges between nets in different metal layers are also
possible ( Aitken 1992 ) . To avoid this loss of accuracy, Heaberlin ( 2006 ) proposed
a heuristic method for high-speed diagnosis feasible for large industrial designs,
which considers a priori all possible bridges in the circuit.
The application of the simple I DDQ bridging fault model has mainly two draw-
backs. The first one is the increase of leakage current in present and future technolo-
gies. The second drawback is that a bridge may have many equivalent faults which
cannot be distinguished.
Some works have been proposed to overcome the limitations caused by the leak-
age current. Gattiker and Maly ( 1996 , 1998 ) presented the amount of diagnostic
information present in current signatures and how the number of current levels
may distinguish bridging faults, which are equivalent under the assumption of the
simple I DDQ bridging fault model. Furthermore, Thibeault and Boisvert ( 1998 )and
Thibeault ( 2000 ) proposed a method based on differential or 'Delta I DDQ ' proba-
bilistic signatures for bridging faults. The method is performed into two steps. The
first one is a pre-processing step, where the most probable faults are listed. This is
the starting point of the second step, where the fault location is carried out by finding
the location that causes the expected current values match experimental measures. In
subsequent works, Hariri and Thibeault ( 2003 , 2006 ) proposed a diagnostic method
combining three data sources, namely: I DDQ measures to identify the most probable
bridging faults, parasitic capacitances extracted from layout to create a list of realis-
tic bridges and finally, logical errors produced by logic fault simulation to perform
fault isolation. The I DDQ stage procedure is based on 'Delta I DDQ ' probabilistic sig-
natures previously proposed in Thibeault and Boisvert ( 1998 )and Thibeault ( 2000 ) .
In relationship with the incapacity of distinguishing two equivalent (in terms
of current consumption) bridging defects, let us consider the two examples illus-
trated in Fig. 2.22 . The quiescent current consumption of both circuits is shown in
Tab le 2.5 . Since the I DDQ behaviour is the same for both defective circuits, the two
different bridging defects could not be distinguished (diagnosed) with the single

a b

V D

V D V F

V A V A

V B

V B

R b

R b

V C V C

V E V E V G

Fig. 2.22 Defective circuits equivalent in terms of I DDQ consumption. ( a ) Bridge connecting an
inverter and a NAND gate. ( b ) Bridge connecting two inverters