Models for Bridging Defects Test and Diagnosis - Models in Hardware Testing - page 38

a b

V C (1)

V C (1)

0 /1 1 /0 0/1 1/0

0/1 1/0 0/1

V A

V A

V B V B

Fig. 2.4 Feedback bridge. ( a ) Even number of inversions and ( b ) odd number of inversions

When the logic path is not sensitized, it is equivalent to a non-feedback bridging
fault. The logic value of the back net is independent of the logic value of the front
net. Considering the examples shown in Fig. 2.4 , this is accomplished as long as V C
is set to logic 0.
If the logic path is sensitized and the feedback loop has an even number of in-
versions, both nets have the same logic value. An example is illustrated in Fig. 2.4 a
provided that V C is set to logic 1. This case is redundant as long as the back net
is stronger than the front net, otherwise a circuit with asynchronous memory be-
haviour appears. It can be described as a latched state. The voltage on the bridged
nets depends on the transistor strengths and the bridge resistance. The detectability
of such fault cases relies on the sequence of test patterns applied.
Finally, if the logic path is sensitized with an odd number of inversions, the logic
values of the bridged nets are opposite on a fault-free circuit (see Fig. 2.4 b ). Two
different behaviours may appear depending on the gate strengths. If the back gate is
stronger than the front gate, it behaves as a non-feedback bridging fault. However,
if the front gate is stronger, the defect may cause oscillation in the circuit. The
oscillation period is related to the delay of the logic connecting the bridged nodes
and it is usually lower than the clock period.
The impact of the bridge resistance in feedback bridges is not a trivial issue, since
it turns out to be computationally complex ( Polian et al. 2003 ). However, bridge
resistances with high values usually result in fewer situations of active feedback
because the dominance conditions of the front net are less likely to be accomplished.

2.2.5 Resistance Characterization of Bridging Defects

For a better knowledge of the defect behaviour, early works have analyzed and
characterized real bridges demonstrating that bridging defects have resistances with
different values which can be modelled with a statistical distribution for each tech-
nology node.
Traditionally, conventional test monitors such as the comb-string-comb structure
( Bruls et al. 1991 ) have been used to characterize the resistive nature of bridging
defects and open defects, both of which are the main contributors to yield loss in
wiring structures. This test monitor basically consists in a long string wire (meander-
shaped) as shown in Fig. 2.5 (from pad S 1 to pad S 2 ) lying between two combs (C 1
and C 2 ). The string and the two combs are made up of the targeted layer of the