Generalized Fault Modeling for Logic Diagnosis - Models in Hardware Testing - page 135

1

≥ 1

1

0 1

=1

a

1

(1) (1)

1

0

x

1

&

0

y

(0)

&

0

0

b

& 1 1

(0) (0)

0

Defect Area of Influence

Fig. 5.1 Resistive bridge with Byzantine effect

Fig. 5.2 Defect site and
surrounding logic

Upstream
Logic

Defect
Site

Downstream
Logic

Partitioning the defective circuit into two parts helps to abstract from the electri-
cal specifics. One part is the defect site . It contains all the gates and signals whose
behavior cannot be explained or modeled at logic level. All signals with degraded
electrical characteristics, all influenced, and all inoperable gates are contained in
this defect site. The other part is the rest of the logic circuit, which implements the
specified logic functionality and operates normally. The signals that connect these
two parts are considered as ordinary logic signals.
Figure 5.2 shows the defect site and its surrounding logic circuit. The upstream
logic is controlled by the inputs of the circuit and provides the defect site with logic
values. The defect site performs some arbitrary function and provides logic values
to the downstream logic. The downstream logic performs the specified functionality.