Fault Modeling for Simulation and ATPG - Models in Hardware Testing - page 123

optimization techniques for fault simulation and SAT-based ATPG would probably
allow handling of industrial-size circuits. The relatively high pattern count could
probably be reduced by implementing compaction procedures. On the other hand,
many of the patterns have only minimal unique detection capability. If fault coverage
slightly below 100% is acceptable, a large number of patterns could be excluded.

4.5 Extensions

This section discusses the extensions to the model required to handle faults in se-
quential circuits and feedback bridging faults, the dynamic effects of resistive faults,
and test application under non-nominal conditions such as supply voltage and tem-
perature.

4.5.1 Sequential Circuits

Even in case of simple fault models such as the stuck-at model, testing a sequen-
tial circuit poses significant challenges ( Pomeranz 1993 ) . Employing design-for-
testability techniques such as scan chains eliminates most of the difficulties and
enables the application of algorithms developed for combinational circuits. Resis-
tive bridging fault simulation of a non-scan sequential circuit must consider the
possibility that a fault effect, represented as an ADI, can be propagated to a flip-flop
and fed back to the circuit in the next time frame, potentially showing up at the site
of the bridging fault.
For instance, assume that the second input of gate A of circuit in Fig. 4.2 is driven
by a flip-flop. Suppose that the RBF is simulated under a sequence of two test pat-
terns, where the first pattern generates an ADI [0, R 0 ] 1/0 on the line feeding that
flip-flop for some resistance value R 0 . This means that the FSIC will be 0111 when
the bridge resistance is between 0 and R 0 , and 0011 otherwise. As we have seen
in Fig. 4.3 , FSICs 0111 and 0011 result in different voltage characteristics and thus
different local ADIs.
From the simulation point of view, analysis for both FSICs must be performed.
The local ADI computed for FSIC 0111 is valid for R sh 2 Œ0; R 0 , and the local ADI
for FSIC 0011 is valid for all other values of R sh . Thus, the ultimate local ADI must
be composed of the respective local ADIs restricted to their ranges of validity. This
phenomenon is known under the name “ multiple strength problem ( Engelke 2006b ) ”
because more than one driving strength of the gates preceding the bridge must be
considered.
While calculating C-ADI taking the multiple strength problem into account is
feasible, the definition of G-ADI in sequential circuits is troublesome. For this rea-
son, E-FC is used as the fault coverage metric for such circuits.